Diff for "KAGRA/Subgroups/DGS/Circuits/AntiAliasImage"

Differences between revisions 1 and 33 (spanning 32 versions)

Anti Alias/Image

Overview

ADC/DACへの入出力のフィルターとしてAnti Alias/Imageを各チャンネルに装備する。
ADCは32ch/board、DACは16ch/board。
基本的にはLIGOの回路図をコピー。

Equipements

JGW-D1100621: AA Chassis Top Assembly (8 x 9 Dsub config)
JGW-D1100650: AI Chassis Top Assembly (4 x 9 Dsub config)

Version 1: 1 AA and 1 AI using LIGO schematic, manufactured by P-ban, delivered to VIS at Kashiwa

LIGO-D070081: AdL AA and AI Filter Board
LIGO-D1000217: Chassis Power Regulator PCB
JGW-D1301499: AA and AI chassis (by Hitz)
designed but not used
- JGW-D1100583: AA Chassis Front panel
- JGW-D1100584: AA Chassis Back panel
- JGW-D1100585: AA and AI Chassis bottom and side panels

Version 2: 5 AA and 5 AI chassis by Hitz

JGW-D1200779: AA and AI Filter Board (by Hitz)
- JGW-D1301498: AA and AI Filter Board detail test results for SN:1,2 (by Hitz)
- JGW-D1301497: AA and AI Filter Board test results for 28/30 bords (by Hitz)
LIGO-D1000217: Chassis Power Regulator PCB
JGW-D1301499: AA and AI chassis (by Hitz)

All circuits list

Related electronics

PCIX ADC Adapter Board

JGW-D120086: PCIX ADC Adapter Board

PCIX DAC Adapter Board

JGW-D120087: PCIX DAC Adapter Board

DSUB-LEMO adapter chassis

JGW-D1200869: DSub-Lemo Interface
JGW-D1200883: KAGRA DSub-Lemo Chassis top assembly1
JGW-D1200880: KAGRA DSub-Lemo Chassis front panel1
JGW-D1200990: KAGRA DSub-Lemo Chassis front panel1(FPD)
JGW-D1200881: KAGRA DSub-Lemo Chassis rear panel
JGW-D1200882: KAGRA DSub-Lemo Chassis bottom/side panel
JGW-D1201004: KAGRA DSub-Lemo Chassis top assembly2
JGW-D1201034: KAGRA DSub-Lemo Chassis front panel2
JGW-D1200991: KAGRA DSub-Lemo Chassis front panel2(FPD)
JGW-D1200882: KAGRA DSub-Lemo Chassis bottom/side panel

DSUB-BNC adapter chassis

JGW-D1200868: DSub-Bnc Interface
JGW-D1200993: KAGRA DSub-Bnc Chassis top assembly1
JGW-D1200995: KAGRA DSub-Bnc Chassis front panel1
JGW-D1200997: KAGRA DSub-Bnc Chassis front panel1(FPD)
JGW-D1200999: KAGRA DSub-Bnc Chassis rear panel1
JGW-D1201000: KAGRA DSub-Bnc Chassis rear panel1(FPD)
JGW-D1200994: KAGRA DSub-Bnc Chassis bottom/side panel
JGW-D1201005: KAGRA DSub-Bnc Chassis top assembly2
JGW-D1200996: KAGRA DSub-Bnc Chassis front panel2
JGW-D1200998: KAGRA DSub-Bnc Chassis front panel2(FPD)
JGW-D1200994: KAGRA DSub-Bnc Chassis bottom/side panel

Reference

Common

LIGO-D070081: AdL AA and AI Filter Board
LIGO-D1000217: Chassis Power Regulator PCB

AA

LIGO-D0902783: aLIGO Anti-Alias Chassis Top Assembly Drawing
- It can be assembled like LIGO-D0902783 as DB9 and DB25 version.
LIGO-D0902782: aLIGO Anti-Alias Chassis Front Panel
LIGO-D0902784: aLIGO Anti-Alias Chassis Back Panel
LIGO-D1000673: aLIGO x10 Anti-Alias Chassis Test Plan
LIGO-D070100: ADC AA Interface

AI

LIGO-D1000305: aLIGO Anti-Image Chassis Top Assembly Drawing
LIGO-D1000551: aLIGO 18-bit DAC to Anti-Image Interface Board

ADC adapter

LIGO-D0902006: AdL General Standards 16 Bit ADC Adapter Board

DAC adapter

LIGO-D0902496: AdL General Standards 16 Bit DAC Adapter Board

KAGRA/Subgroups/DGS/Circuits/AntiAliasImage (last edited 2014-05-23 15:33:17 by OsamuMiyakawa)

-  ⇤ ← Revision 1 as of 2011-03-28 14:22:39 → 
  Size: 768
  Editor: OsamuMiyakawa
  Comment:
+   ← Revision 33 as of 2013-10-04 13:08:08 → ⇥
  Size: 7266
  Editor: OsamuMiyakawa
  Comment:
-Deletions are marked like this.
+Additions are marked like this.
 Line 1:
+## page was renamed from LCGT/subgroup/ifo/digital/Circuits/AntiAliasImage
-Line 3:
+Line 4:
+=== Overview ===
 * ADC/DACへの入出力のフィルターとしてAnti Alias/Imageを各チャンネルに装備する。
 * ADCは32ch/board、DACは16ch/board。
 * 基本的にはLIGOの回路図をコピー。

=== Equipements ===

 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=621|JGW-D1100621]]: AA Chassis Top Assembly (8 x 9 Dsub config)
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=650|JGW-D1100650]]: AI Chassis Top Assembly (4 x 9 Dsub config)


==== Version 1: 1 AA and 1 AI using LIGO schematic, manufactured by P-ban, delivered to VIS at Kashiwa ====
 * [[https://dcc.ligo.org/cgi-bin/DocDB/ShowDocument?docid=4850|LIGO-D070081]]: AdL AA and AI Filter Board
 * [[https://dcc.ligo.org/cgi-bin/DocDB/ShowDocument?docid=8954|LIGO-D1000217]]: Chassis Power Regulator PCB
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=1499|JGW-D1301499]]: AA and AI chassis (by Hitz)

 * designed but not used
  * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/DocDB/ShowDocument?docid=583|JGW-D1100583]]: AA Chassis Front panel
  * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/DocDB/ShowDocument?docid=584|JGW-D1100584]]: AA Chassis Back panel
  * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/DocDB/ShowDocument?docid=585|JGW-D1100585]]: AA and AI Chassis bottom and side panels

==== Version 2: 5 AA and 5 AI chassis by Hitz ====
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=779|JGW-D1200779]]: AA and AI Filter Board (by Hitz)
  * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=1498|JGW-D1301498]]: AA and AI Filter Board detail test results for SN:1,2 (by Hitz)
  * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=1497|JGW-D1301497]]: AA and AI Filter Board test results for 28/30 bords (by Hitz)
 * [[https://dcc.ligo.org/cgi-bin/DocDB/ShowDocument?docid=8954|LIGO-D1000217]]: Chassis Power Regulator PCB
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=1499|JGW-D1301499]]: AA and AI chassis (by Hitz)


----

 * [[KAGRA/Subgroups/AEL/Circuits/List|All circuits list]]

-----

== Related electronics ==

=== PCIX ADC Adapter Board ===

 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=866|JGW-D120086]]: PCIX ADC Adapter Board

=== PCIX DAC Adapter Board ===

 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=867|JGW-D120087]]: PCIX DAC Adapter Board


=== DSUB-LEMO adapter chassis ===

 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=869|JGW-D1200869]]: DSub-Lemo Interface
 *
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=883|JGW-D1200883]]: KAGRA DSub-Lemo Chassis top assembly1
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=880|JGW-D1200880]]: KAGRA DSub-Lemo Chassis front panel1
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=990|JGW-D1200990]]: KAGRA DSub-Lemo Chassis front panel1(FPD)
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=881|JGW-D1200881]]: KAGRA DSub-Lemo Chassis rear panel
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=882|JGW-D1200882]]: KAGRA DSub-Lemo Chassis bottom/side panel
 *
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=1004|JGW-D1201004]]: KAGRA DSub-Lemo Chassis top assembly2
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=1034|JGW-D1201034]]: KAGRA DSub-Lemo Chassis front panel2
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=991|JGW-D1200991]]: KAGRA DSub-Lemo Chassis front panel2(FPD)
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=882|JGW-D1200882]]: KAGRA DSub-Lemo Chassis bottom/side panel

=== DSUB-BNC adapter chassis ===

 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=868|JGW-D1200868]]: DSub-Bnc Interface
 *
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=993|JGW-D1200993]]: KAGRA DSub-Bnc Chassis top assembly1
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=995|JGW-D1200995]]: KAGRA DSub-Bnc Chassis front panel1
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=997|JGW-D1200997]]: KAGRA DSub-Bnc Chassis front panel1(FPD)
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=999|JGW-D1200999]]: KAGRA DSub-Bnc Chassis rear panel1
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=1000|JGW-D1201000]]: KAGRA DSub-Bnc Chassis rear panel1(FPD)
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=994|JGW-D1200994]]: KAGRA DSub-Bnc Chassis bottom/side panel
 *
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=1005|JGW-D1201005]]: KAGRA DSub-Bnc Chassis top assembly2
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=996|JGW-D1200996]]: KAGRA DSub-Bnc Chassis front panel2
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=998|JGW-D1200998]]: KAGRA DSub-Bnc Chassis front panel2(FPD)
 * [[http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=994|JGW-D1200994]]: KAGRA DSub-Bnc Chassis bottom/side panel

----
-Line 5:
+Line 84:
+==== Common ====
-Line 6:
+Line 86:
+ * [[https://dcc.ligo.org/cgi-bin/DocDB/ShowDocument?docid=8954|LIGO-D1000217]]: Chassis Power Regulator PCB

==== AA ====
-Line 8:
+Line 91:
- * [[https://dcc.ligo.org/cgi-bin/DocDB/ShowDocument?docid=8954|LIGO-D1000217]]: Chassis Power Regulator PCB
+ * [[https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=7715|LIGO-D0902782]]: aLIGO Anti-Alias Chassis Front Panel
 * [[https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=7720|LIGO-D0902784]]: aLIGO Anti-Alias Chassis Back Panel
 * [[https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=25230|LIGO-D1000673]]: aLIGO x10 Anti-Alias Chassis Test Plan
-Line 10:
+Line 95:
- * [[https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=25230|LIGO-D1000673]]: aLIGO x10 Anti-Alias Chassis Test Plan
+==== AI ====
 * [[https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=9234|LIGO-D1000305]]: aLIGO Anti-Image Chassis Top Assembly Drawing
 * [[https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=9899|LIGO-D1000551]]: aLIGO 18-bit DAC to Anti-Image Interface Board

==== ADC adapter ====
 * [[https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=5190|LIGO-D0902006]]: AdL General Standards 16 Bit ADC Adapter Board


==== DAC adapter ====
 * [[https://dcc.ligo.org/cgi-bin/private/DocDB/ShowDocument?docid=6787|LIGO-D0902496]]: AdL General Standards 16 Bit DAC Adapter Board