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---- == Minutes == === Timing issues === * Connection from the timing slave may be bad * See the 1PPS signal by a scope * ACS set the trigger at the negative edge - can we check the polarity? * IO chassis is not starting at a good timing * change ADC adapter cards * change cable between timing slave and LIGO large board in IO chassis (loosen cable?) === CPU METER === * We do turn off hyperthreading * Check how many cores - Keith will send the script to check * Version of INTEL sometimes matters * As IO chassis' PCIE GEN1 was discontinued, KAGRA uses GEN2 * One stop card is set to work as GEN1 * BIOS selects GEN1 mode * mother board in IO chassis is for GEN1 but we ---- == Next meeting == LLO - 5PM January 10 2018 KAGRA - 8AM January 11 2018 |
LIGO-KAGRA CDS meeting - 11/16 8am (JST), 11/15 6pm (LLO)
Connection Info
Teamspeak (password protected. KAGRA wiki account is necessary to view this page)
Participants
Keith, Jamie, Rolf, Takahiro, Osamu, Kaji, Keiko
Agenda
KAGRA CDS configuration Small material (Kokeyama)
Timing issue in KAGRA (Yamamoto) slide
- CPU MAX issue in KAGRA (Yamamoto)
Minutes
Timing issues
- Connection from the timing slave may be bad
- See the 1PPS signal by a scope
- ACS set the trigger at the negative edge - can we check the polarity?
- IO chassis is not starting at a good timing
- change ADC adapter cards
- change cable between timing slave and LIGO large board in IO chassis (loosen cable?)
CPU METER
- We do turn off hyperthreading
- Check how many cores - Keith will send the script to check
- Version of INTEL sometimes matters
- As IO chassis' PCIE GEN1 was discontinued, KAGRA uses GEN2
- One stop card is set to work as GEN1
- BIOS selects GEN1 mode
- mother board in IO chassis is for GEN1 but we
Next meeting
LLO - 5PM January 10 2018
KAGRA - 8AM January 11 2018