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<<TableOfContents(3)>>

== Software ==

 * Operating System: Linux k1boot 4.19.0-23-amd64 #1 SMP Debian 4.19.269-1 (2022-12-20) x86_64 GNU/Linux
 * RTS_VERSION=5.1.4
 * Matlab 2019b

== Hardware ==

|| Server || CPU || Memory || Mother Board ||
|| Boot || ? || ? || ? ||
|| DC || ? || ? || ? ||
|| FR || ? || ? || ? ||
|| TR || ? || ? || ? ||
|| NDS || ? || ? || ? ||
|| RTFE-1 || Xeon W-2245 (3.9GHz, 8core) || 32GB (8GB DDR4-3200) || X11SRL-F ||
|| RTFE-2 || Xeon E5-1650 V4 (3.6GHz, 6core) || 64GB || X10SRW-F ||

 * RTFE
  * [[https://git.ligo.org/cds/software/advligorts/-/wikis/Real-Time-Compatible-Systems|CPU list]]
  * [[https://dcc.ligo.org/DocDB/0015/T1000523/004/LIGO-T1000523-v4.pdf|CDS Front-end Computer and I/O Chassis PCIe Bus Layout]]
   * Slot 1 - IRIG-B Receiver
   * Slot 2 – PCIe Host Adapter – Fiber pair 1-2 (1st board)
   * Slot 3 – PCIe Host Adapter – Fiber pair 5-6 (3rd board)
   * Slot 4 – PCIe Host Adapter – Fiber pair 7-8 (4th board)
   * Slot 6 – Dolphin PCIe RFM adapter (IX adapters only x8, but future PX adapters are x16)
   * Slot 7 – PCIe Host Adapter – Fiber pair 3-4 (2nd board)
 * IO chassis
  * Copy from LIGO V4(DCC T1900739)
   * Use Type-A MTP breakout cable for connecting between IO chassis and RTPC [[https://community.fs.com/jp/blog/understanding-polarity-in-mpo-system.html|ref]]
  * Copy from LIGO V1
    * [[https://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=1392|IO chassis Top view]]
 * Dolphin: MXS824 switch, PXH830 PCIe Gen3 card
  * [[https://dcc.ligo.org/LIGO-T2000324|Dolphin Gen3 RFM setup for LIGO CDS systems]]
 * [[https://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=1737|ADC]]
 * [[https://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=1736|DAC]]

== System ==

 * Test Bench 1
  * Debian 10
  * 1 boot server, 1 data concentrator (Installed)
  * 1 frame writer, 1 nds server (Installed), 1 RTFE + v4 like IO chassis, 1 RTFE + v1 like IO chassis
 * Test Bench 2
  * Debian 11
  * 1 boot server, 1 data concentrator
  * 1 frame writer, 1 nds server, ? RTFE + v4 like IO chassis (in preparation)
  * Dolphin Gen3

=== Rack layout ===
 * [[https://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=9427|Production]]
 * [[https://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=14734|Test bench]]

-----

Contents

    1. Software
    2. Hardware
    3. System
      1. Rack layout
  2. Test bench system for KAGRA controls/DAQ
    1. How to access
  3. KAGRAのテストベンチを作るにあたって
    1. 揃えなければいけないものリスト
      1. 佐々木メモ

Software

  • Operating System: Linux k1boot 4.19.0-23-amd64 #1 SMP Debian 4.19.269-1 (2022-12-20) x86_64 GNU/Linux
  • RTS_VERSION=5.1.4
  • Matlab 2019b

Hardware

Server

CPU

Memory

Mother Board

Boot

?

?

?

DC

?

?

?

FR

?

?

?

TR

?

?

?

NDS

?

?

?

RTFE-1

Xeon W-2245 (3.9GHz, 8core)

32GB (8GB DDR4-3200)

X11SRL-F

RTFE-2

Xeon E5-1650 V4 (3.6GHz, 6core)

64GB

X10SRW-F

  • RTFE

    • CPU list

    • CDS Front-end Computer and I/O Chassis PCIe Bus Layout

      • Slot 1 - IRIG-B Receiver
      • Slot 2 – PCIe Host Adapter – Fiber pair 1-2 (1st board)
      • Slot 3 – PCIe Host Adapter – Fiber pair 5-6 (3rd board)
      • Slot 4 – PCIe Host Adapter – Fiber pair 7-8 (4th board)
      • Slot 6 – Dolphin PCIe RFM adapter (IX adapters only x8, but future PX adapters are x16)
      • Slot 7 – PCIe Host Adapter – Fiber pair 3-4 (2nd board)
  • IO chassis
    • Copy from LIGO V4(DCC T1900739)

      • Use Type-A MTP breakout cable for connecting between IO chassis and RTPC ref

    • Copy from LIGO V1
  • Dolphin: MXS824 switch, PXH830 PCIe Gen3 card

  • ADC

  • DAC

System

  • Test Bench 1
    • Debian 10
    • 1 boot server, 1 data concentrator (Installed)
    • 1 frame writer, 1 nds server (Installed), 1 RTFE + v4 like IO chassis, 1 RTFE + v1 like IO chassis
  • Test Bench 2
    • Debian 11
    • 1 boot server, 1 data concentrator
    • 1 frame writer, 1 nds server, ? RTFE + v4 like IO chassis (in preparation)
    • Dolphin Gen3

Rack layout

Test bench system for KAGRA controls/DAQ

How to access

(2018/9/13 updated by Osamu)

  • A desktop PC to access to the TEST bench is located at front-left desk in the control room.
    • You can use the most left monitor. You need to select the desktop PC by switch on the bottom-right of monitor.
  • Or you can login to k1ctr2 directly by

    • ssh -Y controls@172.16.33.21

KAGRAのテストベンチを作るにあたって

揃えなければいけないものリスト

  • 既にある→ :)

  • 未発注 → <:(

ジャンル

物品名

数

状態

備考

　　　　

ラック

1

:)

計算機

DC

1

:)

HDDのback upが必要

計算機

NDS

1

:)

HDDのback upが必要

計算機

FW

1

:)

HDDのback upが必要

計算機

TW

1

:)

計算機

FE

2

:)

計算機

BOOT

1

:)

HDDのback upが必要

計算機

REMOTE

1

:)

計算機

CLIENT WORK STATION

1

:)

　　　　

HD timing master

1

:)

masterじゃなくてfanoutが必要かもしれない

　　　　

IO chassis

2

:)

あと一つたりない

　　　　

ADC

1

:)

　　　　

DAC

1

:)

　　　　

dolphin

1

:)

　　　　

Gfanac

1

:)

スイッチ

switch(TCP/IP用)

1

:)

スイッチ

10GB main(DAQ用)

1

:)

スイッチ

low latency(DAQ用)

1

:)

富士通のやつ---スペアはある

　　　　

10GB SFP

1

:)

　　　　

ミリネット

1

:)

dc0から使い回す?

2016年7月14日時点のラック図
http://gwdoc.icrr.u-tokyo.ac.jp/cgi-bin/private/DocDB/ShowDocument?docid=5383

佐々木メモ

修論では評価をどうするかが一番の問題
定量的な評価
パケットロスの評価
CPUどれくらい食うか
タイミング問題の改善
DAQ，DACのOS変更による影響
診断プロシージャ

KAGRA/Subgroups/DGS/Projects/TestBench (last edited 2023-11-02 09:33:00 by shoichi.oshino)