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Size: 328
Comment:
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Size: 419
Comment:
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| Deletions are marked like this. | Additions are marked like this. |
| Line 2: | Line 2: |
| '''1. Expansion Chasis 内の配線''' (担当:宮川) | '''1. Expansion Chasis 内の配線''' (担当:宮川、due: as soon as possible) |
| Line 4: | Line 4: |
| '''2. ADC / DAC interface の配線チェック''' (担当:宮川、準備:辰巳) | '''2. ADC / DAC interface の配線チェック''' (担当:宮川、準備:辰巳, due:5月の宮川 Caltech 出張) |
| Line 6: | Line 6: |
| '''3. Anti-Alias module 1台、Anti-Imaging module 1台''' (担当:辰巳) | '''3. Anti-Alias module 1台、Anti-Imaging module 1台''' (担当:辰巳、due: 5月末) |
| Line 8: | Line 8: |
| '''4. Binary Output Interface & BO NIM module 試作''' (担当:辰巳) | '''4. Binary Output Interface & BO NIM module 試作''' (担当:辰巳、due: 5月末) |
優先順位付
1. Expansion Chasis 内の配線 (担当:宮川、due: as soon as possible)
2. ADC / DAC interface の配線チェック (担当:宮川、準備:辰巳, due:5月の宮川 Caltech 出張)
3. Anti-Alias module 1台、Anti-Imaging module 1台 (担当:辰巳、due: 5月末)
4. Binary Output Interface & BO NIM module 試作 (担当:辰巳、due: 5月末)
